I2C - Revision history

Dye at 21:04, 8 March 2012

2012-03-08T21:04:24Z

2012-03-08T21:01:11Z

2012-03-08T20:59:28Z

‎Testing: Rise/Fall Time

2012-03-08T20:59:12Z

‎Testing: Rise/Fall Time

2012-03-08T20:58:29Z

‎Baud Rate

@@ Line 27: / Line 27: @@
 Ultra Fast Mode (UFm)	,	5 MHz
 </tab>
 == Testing: Rise/Fall Time ==

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 Common digital electronics do not support the true ±25V. Most electronics are much lower voltages like 2.7V to 6V. They must use transceivers to convert from the low TTL levels (transistor transistor logic) that microprocessor are capable of to the higher voltages required by a true RS232 device.
-== Interface Connector ==
+== I2C Pull Ups ==
-'''DB9'''
-[[File:DB9.JPG|400px|none]]
-−
-RS232 DB-9 Male Pinout (PC Side DTE)
-−
-RS232 DB-9 Female Pinout (Device Side DCE)
-−
-<tab class=wikitable sep=comma head=top>
-Pin,Signal, Signal Name, DTE Direction
-, (DCD), Data Carrier Detect,IN
-, (RXD), Receive Data,IN
-, (TXD), Transmit Data,OUT
-, (DTR), Data Terminal Ready,OUT
-, (GND), Signal Ground,
-, (DSR), Data Set Ready,IN
-, (RTS), Request to Send,OUT
-, (CTS), Clear to Send,IN
-, (RI), Ring Indicator,IN
-</tab>
 == Common I2C Data Rates ==

← Older revision		Revision as of 20:59, 8 March 2012
Line 55:		Line 55:


−	In ~~I2c~~ communication the I2C receivers will have an acquisition at the middle of each bit. A fast rise time will mean that there is more margin in each bit for a correct acquisition. A slow rise or fall time will could mean that the bit is sampled during the rise transition which may be below the voltage input high voltage. Resulting in a false reading.	+	In I2C communication the I2C receivers will have an acquisition at the middle of each bit. A fast rise time will mean that there is more margin in each bit for a correct acquisition. A slow rise or fall time will could mean that the bit is sampled during the rise transition which may be below the voltage input high voltage. Resulting in a false reading.

	== Testing: VIH/VIL ==		== Testing: VIH/VIL ==

← Older revision		Revision as of 20:59, 8 March 2012
Line 55:		Line 55:


−	In ~~RS232~~ communication the ~~RS232~~ receivers will have an acquisition at the middle of each bit. A fast rise time will mean that there is more margin in each bit for a correct acquisition. A slow rise or fall time will could mean that the bit is sampled during the rise transition which may be below the voltage input high voltage. Resulting in a false reading.	+	In I2c communication the I2C receivers will have an acquisition at the middle of each bit. A fast rise time will mean that there is more margin in each bit for a correct acquisition. A slow rise or fall time will could mean that the bit is sampled during the rise transition which may be below the voltage input high voltage. Resulting in a false reading.

	== Testing: VIH/VIL ==		== Testing: VIH/VIL ==

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 </tab>
-== Baud Rate ==
+== Common I2C Data Rates ==
 <tab class=wikitable sep=comma head=top>
 Rates	,	Frequency
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 Fast Mode Plus (Fm+)	,	1 MHz
 Ultra Fast Mode (UFm)	,	5 MHz
 </tab>